In recent years, memory systems implementing non-volatile memory are widely used.
As one of such memory systems, solid-state drives (SSDs) implementing NAND flash memory are known. The SSDs are used as the main storage for various computing devices.
In a non-volatile memory such as the NAND flash memory, the number of program/erase cycles is limited. When the number of executed program/erase cycles reaches a limit value, a failure occurs in the non-volatile memory.
In the non-volatile memory, as the number of bits stored in each memory cell becomes larger, the capacity of the memory cell becomes larger. In addition, the time necessary to write data items in the non-volatile memory and the time necessary to read data items from the non-volatile memory become longer.
In recent years, a memory system capable of writing data items in the non-volatile memory by selectively using a single-level cell (SLC) mode and a multi-level cell (MLC) mode has been developed.